Wow, there went November already. Time sure flies when you’re having fun.

We continued to work on the Qubic Dispatcher. At the moment we’re working on the system boundary entities that allow us to interface with the Tangle (receive/send). We’re also working on the Dispatcher plug-in system that will allow separate components to seamlessly work together as entities through the Qubic Computation Model.

We also came up with a few new improvements to Abra. One of these was the addition of floating point constants to the language itself to work in conjunction with the -now fully functional- floating point functions in AbraLib. The floating point functions work so well that we decided to drop the initial fixed point math functions from AbraLib. We also adjusted the predefined floating point types to make more sense range-wise:

type TinyFloat {mantissa [Tiny]// -/+ 9,841exponent [Tryte]// -/+ 3^13}type Float {// slightly larger than IEEE 754 32-bit floatmantissa [Tiny2]// -/+ 193,710,244exponent [Tryte2] // -/+ 3^364}type Double {// slightly larger than IEEE 754 64-bit doublemantissa [Tiny4]// -/+ 75,047,317,648,499,560exponent [Tiny]// -/+ 3^9,841}type HugeFloat {mantissa [Int2]// -/+ 29,074,868,501,520,029,845,195,084exponent [Tiny2]// -/+ 3^193,710,244}

Another improvement to the Abra language is the addition of a conditional expression operation. Initially it was thought that such an operation would not be possible, but analysis of the AbraLib code base showed the emergence of several usage patterns. By introducing the conditional expression operation one of these patterns could be expressed implicitly while simultaneously improving code readability and decreasing the amount of typing. In addition, a cool new optimization, that is required to make this new operation work well within the Abra language paradigms, will automatically improve the efficiency of any code that uses this pattern explicitly as well.

On the LLVM JIT-compilation side the quality of the generated code was improved a lot. Lukas Tassanyi (MicroHash) really took ownership of this part, and also worked a lot on improvements to the interpreter. He even came up with a very simple Proof of Concept idea that we can use to test the entire system. Sorry, no idea-specific spoilers yet. We want to work it out first.  

On the FPGA side we are now able to generate pretty much the Verilog source code we need to be able to generate the code for FPGAs. Donald is making good progress on being able to finally load the code in an FPGA for a first test run. Anything coming back from those tests will be used to improve the generated Verilog code where necessary.

The Abra documentation series was further modified to reflect the latest changes, and part 6 in this series, about the Qubic Dispatcher and its interaction with the Qubic Computational Model, is now largely done.

We also took the time to look at the system from a distance so that we can get a clearer picture of what it can and cannot do at the moment. When you are inside that development bubble you sometimes get so focused on solving the next immediate problem that you lose track of the overview. So taking a step back and examining what changes to the system or additional components will be necessary to achieve the final goal is a healthy exercise. Internal discussion of some of the findings of this exercise has already started. Once we get clear about any necessary course corrections, we will of course communicate them as soon as possible.

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IOTA Foundation

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